"The instructor was clearly an expert, and extremely good at presenting the material."

Public Workshop Schedule

Don't see a workshop when and where you need it?
Sutherland HDL can also present on-site workshops at your company!

April 2010
27-30	SystemVerilog Verification and Assertions for Verilog Engineers (4-days) Phoenix, Arizona (combines our popular SystemVerilog Verification (3-day) and SystemVerilog Assertions (2-day) workshops) Register	$2,100 (~20% discount)
July 2010
27-30	SystemVerilog Testbench for non-Verilog Verification Engineers (4-days) Phoenix, Arizona (combines our popular Accelerated Verilog and SystemVerilog Testbench workshops) Register	$2,100 (~20% discount)
November 2010
9-12	SystemVerilog Verification and Assertions for Verilog Engineers (4-days) Phoenix, Arizona (combines our popular SystemVerilog Verification (3-day) and SystemVerilog Assertions (2-day) workshops) Register	$2,100 (~20% discount)

Contact Us us for workshop schedule plans beyond these dates, or to request training on-site at your company.

Pricing and Terms for on-site and open-enrollment workshop.

Sign Up to receive updates to our open-enrollment schedule by e-mail.

(Planned workshops and dates are tentative, and may change. Please be sure to confirm workshops before making any travel arrangements.)

April 2010