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About Stuart Sutherland

Explanation of Verilog, SystemVerilog and VHDL

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Workshop Descriptions

• Comprehensive Verilog-2005
• SystemVerilog Synthesis for Verilog Design Engineers
• SystemVerilog Testbench for Verification Engineers
• SystemVerilog Assertions for Design and Verification Engineers
• Accelerated Verilog-2005 with SystemVerilog Synthesis Extensions
• Verilog-2005 PLI 2.o (VPI) with SystemVerilog DPI
• Verilog-2001 PLI 1.0 (TF and ACC)

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Books by Stuart Sutherland

• SystemVerilog For Design
• SystemVerilog for Verification
• Verilog and SystemVerilog Gotchas
• Verilog-2001
• The Verilog PLI Handbook
• Verilog HDL Quick Reference Guide
• Verilog PLI Quick Reference Guide

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